Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a vertical power semiconductor device.
Description of the Background Art
In the manufacture of a semiconductor device, recently, the importance of a processing for reducing the thickness of a semiconductor wafer (hereinafter, also referred to as a “thinning processing”) has increased. In the field of LSI, the thinning processing is useful for high densification of a package by three-dimensional packaging technology or the like, and the wafer thickness at the completion of the process is sometimes reduced to, e.g., about 25 μm. Further, in the field of vertical power semiconductor device, the thinning processing is useful for improving the energization performance, typically such as On-state characteristics, since a current path in a semiconductor device can be shortened by thinning a wafer. In order to reduce cost and improve properties, recently, an ultra-thin wafer process using a wafer thinned to a thickness of about 50 μm, which is formed by an FZ (Floating Zone) method, is sometimes performed.
Among the typical vertical power semiconductor devices are, for example, a diode element and a semiconductor switching element. The semiconductor switching element is typically an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). These elements are widely applied to inverter circuits such as industrial motors, automobile motors, and the like, power supply devices for mass-storage servers, uninterruptible power supplies, and the like.
As the thinning processing, generally performed are mechanical polishing on a wafer back surface by backgrinding or polishing and wet or dry etching for removing processing distortion caused by the mechanical polishing. After that, on the back surface of the wafer, a diffusion layer is formed by ion implantation or heat treatment. Then, an electrode is further formed on the back surface by evaporation or sputtering. After that, dicing of the wafer is performed. Specifically, after mounting the wafer on a dicing sheet, a plurality of chips are cut out from the wafer by using a dicing blade or the like.
In order to prevent breakage of the semiconductor wafer during the thinning processing and after that, a protection tape can be provided on a wafer upper surface. The protection tape not only reinforces the strength of the wafer which is thinned by the thinning processing but also reduces the effect of surface level difference on the wafer upper surface. The surface level difference is formed on an upper surface of the semiconductor wafer in accordance with device structure (a trench gate, an electrode, and the like) in the process of manufacturing the semiconductor device. As the protection tape, for example, a well-known one is formed mainly of polyethylene terephthalate (PET). In the recent thin-type device, however, the ratio of surface level difference to total thickness of a device has become larger, and as a result, it has become difficult to sufficiently absorb the surface level difference by the protection tape. When absorption of the level difference is insufficient, the semiconductor wafer is apt to break, and in particular, breakage of the wafer is apt to occur during grinding.
Then, according to Japanese Patent Application Laid Open Gazette No. 2005-317570, a surface protection tape for backgrinding which is attached to a wafer surface is deformed by heating. The unevenness (projections and depressions) of a polyimide protection film on the wafer surface is reduced.
Further, according to Japanese Patent Application Laid Open Gazette No. 2006-196710, onto a surface of a semiconductor wafer which has projections and depressions, attached is a tape which has an adhesive layer having a thickness larger than the level difference of the projections and depressions and has a base material layer. The adhesive layer has an adhesive agent layer formed of an adhesive agent and a softening material layer formed of a resin material whose viscosity is reduced by heating, which is softer than a component material of the above base material layer. By heating the tape, the viscosity of the softening material layer is reduced. Since the softening material layer is thereby deformed, a surface of the base material layer is almost flattened. After that, by grinding the back surface of the semiconductor wafer while the tape is being attached, the wafer is thinned. According to the description of the Japanese Patent Application Laid Open Gazette No. 2006-196710, with deformation of the softening material layer, the level difference of the projections and depressions on the tape surface becomes about 10% of that on the wafer surface. In other words, with the tape, the level difference of the projections and depressions on the wafer surface is reduced.
The semiconductor wafer after being subjected to the thinning processing is apt to have a warpage. This warpage can be corrected by the protection tape only in a small degree. This is because the protection tape only has relatively low rigidity since the protection tape needs to be easily deformed to some degree for convenience of handling. A wafer having a large warpage has a difficulty in being conveyed and is apt to be broken or chipped in handling. Therefore, the technique using the protection tape is effective for absorption of the surface level difference but not very effective for reduction of the warpage. For this reason, in the prior-art technique using the protection tape, it is sometimes impossible to sufficiently solve the difficulty of handling a wafer after the thinning processing.
As a method of ensuring the rigidity of a semiconductor wafer after the thinning processing in order to reduce its warpage, one possible method is to thin only part of the semiconductor wafer, not the whole thereof. According to Japanese Patent Application Laid Open Gazette No. 2007-19379, for example, a recess is formed by grinding a region corresponding to a device region on a back surface of a wafer, and a ring-shaped reinforcing portion is formed on the outer periphery side of the recess. Unless the ring-shaped reinforcing portion is removed, the outer periphery side of the device region is reinforced by the ring-shaped reinforcing portion. For this reason, handling of the wafer after grinding of the back surface, such as conveyance of the wafer, additional processing on the wafer, or the like, becomes easier.
The technique of providing a resin member such as a protection tape on an upper surface of a semiconductor wafer is effective for preventing breakage of the wafer by absorbing surface level difference on the upper surface. As mentioned above, however, this technique is not very effective for reducing warpage of the wafer. On the other hand, the technique using a reinforcing portion formed by leaving an outer peripheral portion of a wafer thickly is effective for facilitating the handling of the wafer since the warpage of the wafer is reduced by ensuring the rigidity of the wafer. This technique, however, has no effect of absorbing the surface level difference. Therefore, only with this technique, the breakage of the wafer due to the surface level difference is apt to occur.